International Journal of Advances in Electronics and Computer Science ( IJAECS )
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Editor-in-Chief : Dr. P. Suresh
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Publisher:IRAJ
ISSN (p): 2394-2835
Issues /Year :12
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Paper Detail


Paper Title
DDR2 SDRAM Memory Controller

Abstract
Performance of memory system is an essential element in deciding general system performance which becomes limiting factor in deciding overall system performance. The memory controller is the key part of memory system. It handles all the necessary operations related with memory in an efficient way which increases speed of operation with memory and reduces load on the processor. The design of memory controller becomes important part of memory system, because the performance of memory controller becomes constraining element in increasing performance of computing. The DDR is a development adaptation of SDR, after wards DDR has reached its 4th version of memory. This paper includes profound concentrating on the DDR memory and presents some fundamental ideas with respect to DDR memories. Paper explains advantageous features of DDR2 SDRAM over the DDR SDRAM memory. A DDR2 SDRAM memory controller FSM is demonstrated in this paper. The bank management concept for the DDR2 SDRAM is explained. Also a DDR2 SDRAM memory module between the DDR2 SDRAM memory and user end is demonstrated. The user interface is a key unit in the DDR2 SDRAM memory controllers. Index terms— DDR SDRAM, DDR2 SDRAM, FPGA, memory controller, VHDL, read, write.


Author - Akash D. Chothe, Deepti Khurge

Published : Volume-3,Issue-7  ( Jul, 2016 )


DOIONLINE Number - IJAECS-IRAJ-DOIONLINE-5200   View Here

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| Published on 2016-08-17
   
   
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