Paper Title :Contrast Enhancement and Edge Detection in Image Using Zedboard FPGA

Author :Sukanya V. Aher, S. S. Vasekar

Article Citation :Sukanya V. Aher ,S. S. Vasekar , (2016 ) " Contrast Enhancement and Edge Detection in Image Using Zedboard FPGA " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 70-75, Volume-4,Issue-10

Abstract : Image Enhancement plays a vital role in image processing in order to make image more usable. Usually, the image captured from camera are dull in contrast. So, to equalize and enhance the contrast in the image Histogram equalization (HE) method is widely used. But this method results in the change of brightness of image due to flattening of the original histogram. Thus, it is rarely utilized for dull contrast and long distance captured images. An extension of HE algorithm along with edge enhancement to overcome the drawback of HE is proposed in this paper. This algorithm uses HE algorithms such as Global histogram equalization (GHE) and Dynamic histogram equalization (DHE) along with edge enhancement using low pass filter implementation and laplacian filtering using Zedboard FPGA. This algorithm preserves the brightness of image significantly as compared to typical Histogram Equalized image, it also enhances the contrast and edges in the image. Indexterms- Image Enhancement, Histogram Equalization, Edge Enhancement, spatial filtering, Field Programmable Array (FPGA).

Type : Research paper

Published : Volume-4,Issue-10

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